512 Kbit SPI Bus Serial EEPROM
Device Selection Table
Part Number VCC Range Page Size Temp. Ranges Packages |
25LC512 2.5-5.5V 128 Byte I,E P, SN, SM, MF |
Features:
• 20 MHz max. Clock Speed
• Byte and Page-level Write Operations:
- 128-byte page
- 5 ms max.
- No page or sector erase required
• Low-Power CMOS Technology:
- Max. Write Current: 5 mA at 5.5V, 20 MHz
- Read Current: 10 mA at 5.5V, 20 MHz
- Standby Current: 1μA at 2.5V (Deep powerdown)
• Electronic Signature for Device ID
• Self-Timed Erase and Write cycles:
- Page Erase (5 ms, typical)
- Sector Erase (10 ms/sector, typical)
- Bulk Erase (10 ms, typical)
• Sector Write Protection (16K byte/sector):
- Protect none, 1/4, 1/2 or all of array
• Built-In Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High Reliability:
- Endurance: 1 Million erase/write cycles
- Data Retention: >200 years
- ESD Protection: >4000V
• Temperature Ranges Supported:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
• Pb-free and RoHS Compliant
Pin Function Table
Name | Function |
CS | Chip Select Input |
SO | Serial Data Output |
WP | Write-Protect |
VSS | Ground |
SI | Serial Data Input |
SCK | Serial Clock Input |
HOLD | Hold Input |
VCC | Supply Voltage |
Description:
The Microchip Technology Inc. 25LC512 is a 512 Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase functions typically associated with Flash-based products. These functions are not required for byte or page write operations. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled by a Chip Select (CS) input.
Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.
The 25LC512 is available in standard packages including 8-lead PDIP, SOIC, and advanced 8-lead DFN package. All packages are Pb-free and RoHS compliant.
Package Types (not to scale)
Absolute Maximum Ratings (†)
VCC......................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ................................................................................. -0.6V to VCC +1.0V
Storage temperature ..........................................................................................................-65°C to 150°C
Ambient temperature under bias.........................................................................................-40°C to 125°C
ESD protection on all pins.....................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an extended period of time may affect device reliability.
Principles of Operation
The 25LC512 is a 65,536 byte Serial EEPROM designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC® microcontrollers. It may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines programmed properly in firmware to match the SPI protocol.
The 25LC512 contains an 8-bit instruction register. The device is accessed via the SI pin, with data being clocked in on the rising edge of SCK. The CS pin must be low and the HOLD pin must be high for the entire operation.
BLOCK DIAGRAM