ST10F269

16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM

■ HIGH PERFORMANCE 40MHz CPU WITH DSP FUNCTION

– 16-BIT CPU WITH 4-STAGE PIPELINE

– 50ns INSTRUCTION CYCLE TIME AT 40MHz MAX CPU CLOCK

– MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR

– REPEAT UNIT

– ENHANCED BOOLEAN BIT MANIPULATION FACILITIES

– ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS

– SINGLE-CYCLE CONTEXT SWITCHING SUPPORT

■ MEMORY ORGANIZATION

– 256K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER.

– 100K ERASING/PROGRAMMING CYCLES.

– UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTES WITH CAN)

– 2K BYTE ON-CHIP INTERNAL RAM (IRAM)

– 10K BYTE ON-CHIP EXTENSION RAM (XRAM)

■ FAST AND FLEXIBLE BUS

– PROGRAMMABLE EXTERNAL BUS CHARACTERISTICS FOR DIFFERENT ADDRESS RANGES

– 8-BIT OR 16-BIT EXTERNAL DATA BUS

– MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES

– FIVE PROGRAMMABLE CHIP-SELECT SIGNALS

– HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT

■ INTERRUPT

– 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SINGLE CYCLE INTERRUPT DRIVEN DATA

TRANSFER

– 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLING RATE DOWN TO 25ns

■ TIMERS

– TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS

■ TWO 16-CHANNEL CAPTURE / COMPARE UNITS

■ A/D CONVERTER

– 16-CHANNEL 10-BIT

– 4.85µs CONVERSION TIME AT 40MHz CPU CLOCK

■ 4-CHANNEL PWM UNIT

■ SERIAL CHANNELS

– SYNCHRONOUS / ASYNCHRONOUS SERIAL CHANNEL

– HIGH-SPEED SYNCHRONOUS CHANNEL

■ TWO CAN 2.0B INTERFACES OPERATING ON ONE OR TWO CAN BUSSES

(30 OR 2x15 MESSAGE OBJECTS)

■ FAIL-SAFE PROTECTION

– PROGRAMMABLE WATCHDOG TIMER

– OSCILLATOR WATCHDOG

■ ON-CHIP BOOTSTRAP LOADER

■ CLOCK GENERATION

– ON-CHIP PLL

– DIRECT OR PRESCALED CLOCK INPUT

■ REAL TIME CLOCK

■ UP TO 111 GENERAL PURPOSE I/O LINES

– INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION

– PROGRAMMABLE THRESHOLD (HYSTERESIS)

■ IDLE AND POWER DOWN MODES

■ SINGLE VOLTAGE SUPPLY: 5V ±10% (EMBEDDED REGULATOR FOR 3.3 V CORE SUPPLY).

■ TEMPERATURE RANGE: -40 +125° C

■ 144-PIN PQFP PACKAGE

Absolute Maximum Ratings

Note: 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. During overload conditions (V_IN > V_DD or V_IN < V_SS) the voltage on pins with respect to ground (V_SS) must not exceed the values defined by the Absolute Maximum Ratings.

Logic Symbol

Pin Configuration (top view)