LP2997 DDR-II Termination Regulator

General Description

The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2997 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.

Features

• Source and sink current

• Low output voltage offset

• No external resistors required

• Linear topology

• Suspend to Ram (STR) functionality

• Low external component count

• Thermal Shutdown

• Available in SO-8, PSOP-8 packages

Applications

• DDR-II Termination Voltage

• SSTL-18 Termination

Typical Application Circuit

Connection Diagrams

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

PVIN, AVIN, VDDQ to GND

No pin should exceed AVIN −0.3V to +6V

Storage Temp. Range −65˚C to +150˚C

Junction Temperature 150˚C

Lead Temperature (Soldering, 10 sec) 260˚C

SO-8 Thermal Resistance (θJA) 151˚C/W

PSOP-8 Thermal Resistance (θJA) 43˚C/W

Minimum ESD Rating (Note 2) 1kV

Operating Range

Junction Temp. Range (Note 3) 0˚C to +125˚C

AVIN to GND 2.2V to 5.5V

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