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RT9173/A

Peak 3A Bus Termination Regulator

General Description

The RT9173/A regulator is designed to convert voltage supplies ranging from 1.6V to 6V into a desired output voltage which adjusted by two external voltage divider resistors. The regulator is capable of sourcing or sinking up to 3A of peak current while regulating an output voltage to within 2% (DDR 1) and 3% (DDR 2) or less.

The RT9173/A, used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses and distributed backplane designs. The voltage output of the regulator can be used as a termination voltage for DDR SDRAM.

Current limits in both sourcing and sinking mode, plus onchip thermal shutdown make the circuit tolerant of the output fault conditions.

Features

• Support Both DDR 1 (1.25V_TT) and DDR 2 (0.9V_TT) Requirements
• SOP-8, TO-252-5 and TO-263-5 Packages
• Capable of Sourcing and Sinking 3A Peak Current
• Current-limiting Protection
• Thermal Protection
• Integrated Power MOSFETs
• Generates Termination Voltages for SSTL-2
• High Accuracy Output Voltage at Full-Load
• Adjustable V_OUT by External Resistors
• Minimum External Components
• Shutdown for Standby or Suspend Mode Operation with High-impedance Output
• RoHS Compliant and 100% Lead (Pb)-Free

Applications

• DDR Memory Termination
• Active Termination Buses
• Supply Splitter

Absolute Maximum Ratings

Input Voltage ----------------------------------------------------------------------------------------------------- 7V

Power Dissipation ----------------------------------------------------------------------------- Internally Limited

ESD Rating ------------------------------------------------------------------------------------------------------ 2kV

Storage Temperature Range ----------------------------------------------------------------- −65°C to 150°C

Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------- 260°C

Power Dissipation, P_D @ T_A = 25°C

TO-263-5-------------------------------------------------------------------------------------------------- 1.923W

TO-252-5---------------------------------------------------------------------------------------------------1.471W

SOP-8 ----------------------------------------------------------------------------------------------------- 0.625W

Package Thermal Resistance (Note 1)

TO-263-5, θ_JC ------------------------------------------------------------------------------------------- 7.7°C/W

TO-252-5, θ_JC --------------------------------------------------------------------------------------------- 8°C/W

SOP-8, θ_JC --------------------------------------------------------------------------------------------- 23.2°C /W

TO-263-5,θ_JA --------------------------------------------------------------------------------------------- 52°C/W

TO-252-5, θ_JA --------------------------------------------------------------------------------------------- 68°C/W

SOP-8, θ_JA ------------------------------------------------------------------------------------------------ 160°C/W

Note 1. θ_JA is measured in the natural convection at T_A = 25°C on a low effective thermal conductivity test board (single Layers, 1S) of JEDEC 51-3 thermal measurement standard. The case point of θ_JC is on the on the center of V_CTRL pins (Lead 6 & 7) for SOP-8 packages, the center of heat sink (tab) for TO-252-5 and TO-263-5 packages.

Pin Configurations

Typical Application Circuit

Function Block Diagram