8XC52/54/58/80C32

8XC51FA/FB/FC/80C51FA

8XC51RA+/RB+/RC+/RD+/80C51RA +

80C51 8-bit microcontroller family

8K–64K/256–1K OTP/ROM/ROMless,

low voltage (2.7V–5.5V), low power, high speed (33 MHz)

DESCRIPTION

Three different Single-Chip 8-Bit Microcontroller families are presented in this datasheet:

• 80C32/8XC52/8XC54/8XC58

• 80C51FA/8XC51FA/8XC51FB/8XC51FC

• 80C51RA+/8XC51RA+/8XC51RB+/8XC51RC+/8XC51RD+

For applications requiring 4K ROM/EPROM, see the 8XC51/80C31 8-bit CMOS (low voltage, low power, and high speed) microcontroller families datasheet.

All the families are Single-Chip 8-Bit Microcontrollers manufactured in advanced CMOS process and are derivatives of the 80C51 microcontroller family. All the devices have the same instruction set as the 80C51.

These devices provide architectural enhancements that make them applicable in a variety of applications for general control systems.

The ROMless devices, 80C32, 80C51FA, and 80C51RA+ can address up to 64K of external memory. All the devices have four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits. For systems that require extra memory capability up to 64k bytes, each can be expanded using standard TTL-compatible memories and logic.

Its added features make it an even more powerful microcontroller for applications that require pulse width modulation, high-speed I/O and up/down counting capabilities such as motor control. It also has a more versatile serial channel that facilitates multiprocessor communications.

FEATURES

• 80C51 Central Processing Unit

• Speed up to 33MHz

• Full static operation

• Operating voltage range: 2.7V to 5.5V @ 16MHz

• Security bits:

– ROM – 2 bits

– OTP–EPROM – 3 bits

• Encryption array – 64 bytes

• RAM expandable to 64K bytes

• 4 level priority interrupt

• 6 or7 interrupt sources, depending on device

• Four 8-bit I/O ports

• Full-duplex enhanced UART

– Framing error detection

– Automatic address recognition

• Power control modes

– Clock can be stopped and resumed

– Idle mode

– Power down mode

• Programmable clock out

• Second DPTR register

• Asynchronous port reset

• Low EMI (inhibit ALE)

ABSOLUTE MAXIMUM RATINGS^{1, 2, 3}

NOTES:

1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section of this specification is not implied.

2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maximum.

3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless otherwise noted.

BLOCK DIAGRAM

LOGIC SYMBOL

PIN CONFIGURATIONS

DUAL IN-LINE PACKAGE PIN FUNCTIONS

PLASTIC LEADED CHIP CARRIER PIN FUNCTIONS

PLASTIC QUAD FLAT PACK

PIN FUNCTIONS