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fhigh-performance microcontroller units MCUs)

Description:

The M68HC11K Family of high-performance microcontroller units

(MCUs) offers a non-multiplexed expanded bus, high speed and low

power consumption. The fully static design allows operation at

frequencies from dc to 4 MHz.

This manual contains information concerning standard and

custom-ROM (read-only memory) devices. Standard devices include

those replacing the ROM with:

• Disabled ROM

• Disabled EEPROM (electrically erasable, programmable read-only memory)

• EPROM (erasable, programmable read-only memory)

• OTPROM (one-time progammable read-only memory)

Custom-ROM devices have a ROM array that is programmed at the

factory to customer specifications.

M68HC11K Family devices feature up to 62 input/output (I/O) lines

distributed among eight ports, A through H. The KS Family removes

seven pins from port G and four pins from port H for a total of 51 I/O

lines. The KSx versions feature a slow mode for the clocks to allow

power conservation.

Applications:

M68HC11K Family features include:

• 8-bit opcodes and data

• 16-bit addressing

• Two 8-bit accumulators, which can be concatenated to form one

16-bit accumulator

• On-board memory:

– 24 Kbytes or 32 Kbytes of ROM, EPROM, or OTPROM

– 768 bytes or 1 Kbyte of static RAM (random-access memory)

– 640 bytes of EEPROM

– 128-byte register block

• Dual-function I/O lines — Any pins used for the microcontroller’s

peripheral functions can be configured as general-purpose I/O lines.

• Non-multiplexed address and data buses

• 68HC11K4 offers:

– 1 Mbyte of address space, using on-chip memory mapping logic

– Four programmable chip selects (expanded modes)

• 16-bit timer system:

– Three input capture (IC) channels, record event timing by storing the value of the timing system’s 16-bit free-running counter when an input signal transition occurs.

– Four output compare (OC) channels, provide timed outputs by signaling when the free-running counter reaches a predetermined number.

– One IC or OC channel (software selectable)

• 8-bit pulse accumulator

• Four 8-bit pulse-width modulation (PWM) outputs

• Enhanced asynchronous serial communications interface (SCI)

• Enhanced synchronous serial peripheral interface (SPI)

• 8-channel, 8-bit, analog-to-digital (A/D) converter

• Computer operating properly (COP) watchdog system to guard

against infinite loops and other system problems

• Real-time interrupt timer

• Power-saving modes:

– Slow mode reduces power consumption by slowing down

internal operations.

– Wait mode shuts down various system features selected by

the user with power consumption typically dropping to

10–100 mW.

– Stop mode also shuts down system clocks, typically reducing

power consumption to about 1.5 mW.

• Package availability for ROM devices:

– K versions:

84-pin plastic leaded chip carrier (PLCC)

80-pin quad flat pack (QFP)

– KS versions:

68-pin plastic leaded chip carrier (PLCC)

80-pin low-profile quad flat pack (LQFP)

• Package availability for EPROM devices:

– K versions:

80-pin quad flat pack (QFP)

84-pin J-cerquad (ceramic windowed version of PLCC)

84-pin plastic leaded chip carrier (PLCC)

– KS versions:

68-pin J-cerquad (ceramic windowed version of PLCC)

80-pin low-profile quad flat pack (LQFP)

68-pin plastic leaded chip carrier (PLCC)

Specifications:

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