ESL Display 2.66 inch, E-ink display 2.66 inch Description

SAEF Technology SFEPD266H-7005A01 is an Active Matrix Electrophoretic Display(AM EPD), with interface and a reference system design. The 2.66” active area contains 152x296 pixels. The module is a TFT- array driving electrophoretic display, with integrated circuits including gate buffer, source buffer, MCU interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM. Module can be used in portable electronic devices, such as Electronic Shelf Label (ESL) System.

Features

 152×296pixels display

 White reflectance above 30%

 Contrast ratio above 8:1

 Ultra wide viewing angle

 Ultra low power consumption

 Pure reflective mode

 Bi-stable display

 Landscape, portrait modes

 Ultra Low current deep sleep mode

 On chip display RAM

 Waveform stored in On-chip OTP

 Serial peripheral interface available

 On-chip oscillator

 On-chip booster and regulator control for generating VCOM, Gate and Source driving voltage

 I 2C signal master interface to read extemal temperature sensor

Application

Electronic Shelf Label System

Pin Definition

Pin1, NC Do not connect with other NC pins

Pin2, GDR / O / N-Channel MOSFET Gate Drive Control

Pin3, RESE / I / Current Sense Input for the Control Loop

Pin4, NC Do not connect with other NC pins

Pin5, VDHR / C / Positive source driver voltage for Source

Pin6, TSCL / O / I2C Interface to digital temperature sensor Clock pin

Pin7, TSDA / I/O / I2C Interface to digital temperature sensor Data pin

Pin8, BS / I / Bus Interface selection pin (NOTE 5-4)

Pin9, BUSYN / O / Busy state output pin (NOTE 5-3)

Pin10, RSTN / I / Reset signal input. Active Low.

Pin11, D/C / I / Data /Command control pin (NOTE 5-2)

Pin12, CSB / I / Chip select input pin (NOTE 5-1)

Pin13, SCL / I / Serial Clock pin (SPI)

Pin14, SDA / I / Serial Data pin (SPI)

Pin15, VDDIO / P / Power Supply for interface logic pins. It should be connected with VDD

Pin16, VDD / P / Power Supply for the chip

Pin17, GND / P / Ground

Pin18, VDDD / C / Core logic power pin VDDD can be regulated internally from VDD. A capacitorshould be connected between VDDD and VSS under all circumstances

Pin19, VPP / P / Power Supply for OTP Programming

Pin20, VSH / C / Positive Source driving voltage 2

Pin21, VGH / C / Positive Gate driving voltage

Pin22, VSL / C / Negative Source driving voltage

Pin23, VGL / C / Negative Gate driving voltage

Pin24, VCOM / C / VCOM driving voltage

I = Input Pin, O =Output Pin, I/O = Bi-directional Pin (Input/Output), P = Power Pin, C = Capacitor Pin

Note 5-1: This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CSB is pulled LOW.

Note 5-2: This pin is Data/Command control pin connecting to the MCU in 4-wire SPI mode. When the pin is pulled HIGH, the data at SDA will be interpreted as data. When the pin is pulled LOW, the data at SDA will be interpreted as command.

Note 5-3: This pin is Busy state output pin. When Busy is High, the operation of chip should not be interrupted, command should not be sent, e.g., The chip would put Busy pin High when - Outputting display waveform - Programming with OTP - Communicating with digital temperature sensor

Note 5-4: Bus interface selection pin

BS State MCU Interface

L 4-lines serial peripheral interface(SPI)

H 3- lines serial peripheral interface(SPI) - 9 bits SP

ESL Display 2.66 inch, E-ink display 2.66 inch Product Drawing

ESL Display 2.66 inch, E-ink display 2.66 inch Product Image

Notes:

1. The typical power is measured with following transition from horizontal 2 gray scale pattern to vertical 2 gray scale pattern. (Figure 6-2)

2.The deep sleep power is the consumed power when the panel controller is in deep sleep mode.

3.The listed electrical/optical characteristics are only guaranteed under the controller & waveform provided by SAEF.

FACTORY AND FACILITIES

CONTACT

Welcome to inquire via ck@saef.com.cn

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