MT40A512M16HA-083E:A Memory ICs DRAM SDRAM - DDR4 SMD/SMT Tray
• VDD = VDDQ = 1.2V ±60mV
• VPP = 2.5V, –125mV, +250mV
• On-die, internal, adjustable VREFDQ generation
• 1.2V pseudo open-drain I/O
• Refresh time of 8192-cycle at TC temperature range: – 64ms at -40°C to 85°C – 32ms at >85°C to 95°C – 16ms at >95°C to 105°C
• 16 internal banks (x4, x8): 4 groups of 4 banks each
• 8 internal banks (x16): 2 groups of 4 banks each
• 8n-bit prefetch architecture
• Programmable data strobe preambles
• Data strobe preamble training
• Command/Address latency (CAL)
• Multipurpose register READ and WRITE capability
• Write leveling • Self refresh mode
• Low-power auto self refresh (LPASR)
• Temperature controlled refresh (TCR)
• Fine granularity refresh
• Self refresh abort
• Maximum power saving
• Output driver calibration
• Nominal, park, and dynamic on-die termination (ODT)
• Data bus inversion (DBI) for data bus
• Command/Address (CA) parity
• Databus write cyclic redundancy check (CRC)
• Per-DRAM addressability
• Connectivity test
• JEDEC JESD-79-4 compliant
• sPPR and hPPR capability
Micron Technology | |
DRAM | |
RoHS: | Details |
SDRAM - DDR4 | |
SMD/SMT | |
FBGA-96 | |
16 bit | |
512 M x 16 | |
8 Gbit | |
1.2 GHz | |
1.26 V | |
1.14 V | |
83 mA | |
0 C | |
+ 95 C | |
MT40A | |
Tray | |
Brand: | Micron |
Product Type: | DRAM |
1020 | |
Subcategory: | Memory & Data Storage |