MCP1727-3302E/MF New electronic ic chips LDO Voltage Regulators 1.5A CMOS LDO 3.3V DFN8

Features

• 1.5A Output Current Capability

• Input Operating Voltage Range: 2.3V to 6.0V

• Adjustable Output Voltage Range: 0.8V to 5.0V

• Standard Fixed Output Voltages: - 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V

• Other Fixed Output Voltage Options Available Upon Request

• Low Dropout Voltage: 330 mV typical at 1.5A

• Typical Output Voltage Tolerance: 0.5%

• Stable with 1.0 µF Ceramic Output Capacitor

• Fast response to Load Transients

• Low Supply Current: 120 µA (typical)

• Low Shutdown Supply Current: 0.1 µA (typical)

• Adjustable Delay on Power Good Output

• Short Circuit Current Limiting and Overtemperature Protection

• 3 mm x 3 mm DFN-8 and SOIC-8 Package Options

• Passes Automotive AEC-Q100 Reliability Testing

Applications

• High-Speed Driver Chipset Power

• Networking Backplane Cards

• Notebook Computers

• Network Interface Cards

• Palmtop Computers

• 2.5V to 1.XV Regulators

Description

The MCP1727 is a 1.5A Low Dropout (LDO) linear regulator that provides high current and low output voltages in a very small package. The MCP1727 comes in a fixed (or adjustable) output voltage version, with an output voltage range of 0.8V to 5.0V. The 1.5A output current capability, combined with the low output voltage capability, makes the MCP1727 a good choice for new sub-1.8V output voltage LDO applications that have high current demands.

The MCP1727 is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the entire regulator solution. Only 1 µF of output capacitance is needed to stabilize the LDO

Using CMOS construction, the quiescent current consumed by the MCP1727 is typically less than 120 µA over the entire input voltage range, making it attractive for portable computing applications that demand high output current. When shut down, the quiescent current is reduced to less than 0.1 µA.

The scaled-down output voltage is internally monitored and a power good (PWRGD) output is provided when the output is within 92% of regulation (typical). An external capacitor can be used on the CDELAY pin to adjust the delay from 200 µs to 300 ms.

The overtemperature and short circuit current-limiting provide additional protection for the LDO during system fault conditions.