The USRP-LW X310 is a next-generation, high-performance Software-Defined Radio (SDR) platform engineered for sophisticated software radio research and development. Its digital processing core is powered by the Xilinx Kintex-7 410T FPGA, which seamlessly integrates the RF front-end, DDR3 memory, and high-speed host interface connectivity. The FPGA comes preconfigured with essential components for digital down-conversion (DDC), digital up-conversion (DUC), fine frequency tuning, and other advanced DSP functionalities via the UHD framework.
Developers can harness the extensive computational capabilities of the Kintex-7 FPGA alongside the RFNoC (RF Network-on-Chip) development framework to design and implement custom DSP modules tailored to specific application requirements.
GNU Radio
Matlab
LabView
UHD
DC Voltage Input | 12V | Single-sideband Mirroring/LO Rejection (With Paired With UBX-LW 160) | -35/50dBc |
Power Consumption | 45W | 1GHz@10KHz Phase Noise | -108 dBc/Hz |
ADC Sampling Rate (Max) | 200 MSps | 3.6GHz@10KHz Phase Noise | -102 dBc/Hz |
ADC Resolution | 14 bits | 1GHz Output Power | 20dBm |
DAC Sampling Rate | 800 MSps | 2.4GHz Output Power | 20dBm |
DAC Resolution | 16 bits | 5.8GHz Output Power | 7dBm |
Maximum Transfer | 200 MSps | IIP3 | 0dB |
Rate With Host (16b) | |||
Local Oscillator Accuracy | 2.5ppm | Noise Figure | 8dB |
Unlocked GPSDO Accuracy | 20ppb | Weight | 2.5Kg |
Size | 29*22.5*4.5 CM |
The USRP-LW X310 offers a variety of high-speed interfaces for selection. Depending on different application scenarios, such as those requiring expanded bandwidth and low latency, or multi-node processing, etc., it provides diverse interface options.
The Kintex 7-410T FPGA offers significant parametric advantages, delivering substantial value to its performance. Firstly, it features 406,720 logic cells and 1,600 DSP slices, providing robust signal processing capabilities to efficiently handle complex communication algorithms (such as OFDM and MIMO), making it suitable for high-bandwidth applications. Secondly, its 16 high-speed transceivers at 12.5 Gb/s support multi-channel, high-throughput data transmission, meeting real-time signal processing demands.
Packing List
P/N | USRP-LW X310 | USRP-LW N321 | USRP-LW N310 | USRP-LW N210 | USRP-LW E310 | USRP-LW B210 | USRP-LW B205 (Module) | USRP-LW B205 (Board) |
Picture | | | | | | | | |
Frequency Range | DC-6GHz | 3MHz-6GHz | 10MHz-6GHz | DC-6GHz | 70MHz-6GHz | |||
RF Daughterboard | Support two Daughterboards | Built-in two Daughterboards (non-replaceable) | Built-in two Daughterboards (non-replaceable) | Support one Daughterboards | Unsupported | |||
Max. Bandwidth | 160MHz each | 200MHz each | 100MHz each | 8-bit width:80MHz 16-bit width:25MHz | 56MHz each | |||
Channels NO. | 2T2R | 2T2R | 4T4R | 1T1R | 2T2R | 2T2R | 1T1R | 1T1R |
ADC/DAC | ADCs: ADS62P48 DACs: AD9146 | ADCs:AD9695B DACs:DAC37J82 | AD9371
| ADCs:ADS62P42
| AD9361 ADCs:12-bit 61.44MS/s DACs:12-bit 61.44MS/s | AD9364 ADCs:12位61.44MS/s DACs:12位61.44MS/s | ||
FPGA Model | Xilinx Kintex-7 XC7K410T | Xilinx Zynq-7100 SoC FPGA | Xilinx Zynq-7100 SoC FPGA | Xilinx Spartan XC3SD3400A | Xilinx Zynq 7020 SoC FPGA | Xilinx Spartan 6 XC6SLX150 | Xilinx XC7AT200 | Xilinx Artix 7 |
Data Interface | GigE Port, 10GbE Port, PCIE x4 | GigE Port, 10GbE Port, QSFP(2*10G) ,A-USB, micro-US | GigE Port, 10GbE Port, A-USB,micro USB | Gigabit Ethernet Port | Ethernet Port, USB2.0 | USB3.0 | ||
Size (mm) | 290*225*45 | 380*220*45 | 425*220*45 | 225*165*62 | 133*68*26 | 179*127*48 | 107*65*20 | 104*57 |
Unit Price | 9999 | 23999 | 17999 | 3699 | 5999 | 2199 | 2199 | 599 |
P/N | Description | Picture |
LFRX/LFTX-LW | 0-30MHz Frequency Range, 30MHz BW | |
WBX-LW 40/120 | 50MHz-2.2 GHz Frequency Range, 40MHz/120MHz BW | |
SBX-LW 40/120 | 400 MHz - 4.4GHz Frequency Range, 40MHz/120MHz BW | |
UBX-LW 40/60 | 10 MHz - 6 GHz Frequency Range, 40MHz/160MHz BW | |
TwinRX-LW | 10MHz-6GHz Frequency Range, 80MHz BW | |
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