The USRP-LW N210 series features high bandwidth and wide dynamic range processing capabilities, specifically designed for demanding communication applications. Its architecture includes a Xilinx Spartan3A-DSP3400 FPGA, dual-channel ADC (100 MSPS), dual-channel DAC (400 MSPS), and data transmission via Gigabit Ethernet. Covering a frequency range from DC to 6 GHz, the modular design supports synchronization of multiple units through expansion ports to form a MIMO system. The GPDSO option module provides a GPS reference clock with ±0.01 ppm accuracy for multiple devices. Capable of delivering up to 50 MHz RF bandwidth to the host, the device allows users to implement custom functions in the FPGA or on the 32-bit RISC soft core. The feature-rich FPGA firmware processes up to 100 MHz RF signals (uplink and downlink) and supports updates via Gigabit Ethernet.
Supported Development Tools
GNU Radio
Matlab
UHD
Labview
Specifications
DC Voltage Input | 6V | Single-sideband Mirroring/LO Rejection (When Paired With WBX-LW) | -35/50dBc |
Current | 1.3A | @1kHz Phase Noise (1GHz) | -96 dBc/Hz |
Current (WithWBX Daughter Board) | 2.3A | @10kHz Phase Noise (1GHz) | -103 dBc/Hz |
ADC Maximum Sampling Rate | 250MSps | @100kHz Phase Noise (1GHz) | -110 dBc/Hz |
ADC Resolution | 14 bits | Output Power | 15dBm |
ADC SFDR | 87dBc | IIP3 | 0dBm |
DAC Sampling Rate | 400 MSps | Noise Figure | 5dB |
DAC Resolution | 16 bits | Operating Temperature | 0-55°C |
DAC SFDR | 80dBc | Size | 22.5*16.5*6.2 CM |
Maximum Tansfer Rate With Host (8b/16b) | 50/25 MSps | Weight | 1.4Kg |
Local Oscillator Accuracy | 2.5ppm |
P/N | USRP-LW X310 | USRP-LW N321 | USRP-LW N310 | USRP-LW N210 (Plus) | USRP-LW E310 | USRP-LW B210 | USRP-LW B205 (Module) | USRP-LW B205 (Board) |
Picture | | | | | | | | |
Frequency Range | DC-6GHz | 3MHz-6GHz | 10MHz-6GHz | DC-6GHz | 70MHz-6GHz | |||
RF Daughterboard | Support two Daughterboards | Built-in two Daughterboards (non-replaceable) | Built-in two Daughterboards (non-replaceable) | Support one Daughterboards | Unsupported | |||
Max. Bandwidth | 160MHz each | 200MHz each | 100MHz each | 8-bit width:80MHz each 16-bit width:25MHz each | 56MHz each | |||
Channels NO. | 2T2R | 2T2R | 4T4R | 1T1R | 2T2R | 2T2R | 1T1R | 1T1R |
ADC/DAC | ADCs: ADS62P48
DACs: AD9146 | ADCs:AD9695B
DACs:DAC37J82 | AD9371
| ADCs:ADS62P42
| AD9361 ADCs:12-bit 61.44MS/s DACs:12-bit 61.44MS/s | AD9364 ADCs:12位61.44MS/s DACs:12位61.44MS/s | ||
FPGA Model | Xilinx Kintex-7 XC7K410T | Xilinx Zynq-7100 SoC FPGA | Xilinx Zynq-7100 SoC FPGA | Xilinx Spartan XC3SD3400A | Xilinx Zynq 7020 SoC FPGA | Xilinx Spartan 6 XC6SLX150 | Xilinx XC7AT200 | Xilinx Artix 7 |
Data Interface | GigE Port, 10GbE Port, PCIE x4 | GigE Port, 10GbE Port, QSFP(2*10G) ,A-USB, micro-US | GigE Port, 10GbE Port, A-USB,micro USB | Gigabit Ethernet Port | Ethernet Port, USB2.0 | USB3.0 | ||
Size (mm) | 290*225*45 | 380*220*45 | 425*220*45 | 225*165*62 | 133*68*26 | 179*127*48 | 107*65*20 | 104*57 |
Unit Price | 9999 | 23999 | 17999 | 3699 | 5999 | 2199 | 2199 | 599 |
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