ISPLSI1032-60LG In-System Programmable High Density PLD, Lattice

logic Devices

In-System Programmability Introduction:
The ispLSI devices are the in-system programmable versions of the Lattice Semiconductor High-Density programmable Large Scale Integration (pLSI) devices. By integrating all the high voltage programming circuitry onchip, programming can be accomplished by simply shifting data into the device. Once the function is programmed, the non-volatile E2CMOS cells will not lose the pattern even when the power is turned off. All necessary programming is done via five TTL level logic interface signals. These five signals are fed into the on-chip programming circuitry where a state machine controls the programming. The interface signals are isp
Enable (ispEN), Serial Data In (SDI), Serial Data Out
(SDO), Serial Clock (SCLK) and Mode (MODE) control.
Figure 4 illustrates the block diagram of one possible
scheme for programming the ispLSI devices. For details
on the operation of the internal state machine and programming
of the device please refer to the ISP Architecture
and Programming section in this Data Book.

Description
The ispLSI 1048C/883 is a High-Density Programmable
Logic Device processed in full compliance to MIL-STD-
883. This military grade device contains 288 Registers,
96 Universal I/O pins, 12 Dedicated Input pins, two
Global Output Enables (GOE), four Dedicated Clock
Input pins and a Global Routing Pool (GRP). The GRP
provides complete interconnectivity between all of these
elements. The isp LSI 1048C/883 features 5-Volt in system
programming and in-system diagnostic
capabilities.

Information :
It is the first device which offers non-volatile
reprogrammability of the logic, and the interconnect to
provide truly reconfigurable systems. Compared to the
ispLSI 1048, the ispLSI 1048C/883 offers two additional
dedicated inputs and two new Global Output Enable pins.
The basic unit of logic on the ispLSI 1048C/883 device is
the Generic Logic Block (GLB). The GLBs are labeled A0,
A1 .. F7 in figure 1. There are a total of 48 GLBs in the
ispLSI 1048C/883 devices. Each GLB has 18 inputs, a
programmable AND/OR/XOR array, and four outputs
which can be configured to be either combinatorial or
registered. Inputs to the GLB come from the GRP and
dedicated inputs. All of the GLB outputs are brought back
into the GRP so that they can be connected to the inputs
of any other GLB on the device.

i ispLSI and pLSI 1032 Ordering Information:

Application:
Interface, RF & Wireless, Timing etc



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